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ADE7758
Data Sheet
HPF
DIGITAL
INTEGRATOR
SIGN 2 6
AWATTOS[11:0]
2 0 2 –1 2 –2 2 –3 2 –4
15
AWATTHR[15:0]
0
I
CURRENT SIGNAL–i(t)
0x2851EC
MULTIPLIER
LPF2
+
+
AWG[11:0]
%
+
+
40
0
0x00
0xD7AE14
V
Φ
PHCAL[6:0]
AVERAGE POWER
SIGNAL–P
T
WDIV[7:0]
TOTAL ACTIVE POWER IS
ACCUMULATED (INTEGRATED) IN
THE ACTIVE ENERGY REGISTER
VOLTAGE SIGNAL–v(t)
0x2852
000x
0xD7AE
0xCCCCD
0x00000
TIME (nT)
Figure 67. ADE7758 Active Energy Accumulation
The ADE7758 achieves the integration of the active power
signal by continuously accumulating the active power signal in
the internal 41-bit energy registers. The watt-hr registers
(AWATTHR, BWATTHR, and CWATTHR) represent the upper
16 bits of these internal registers. This discrete time accumulation
or summation is equivalent to integration in continuous time.
Equation 20 expresses the relationship.
This is the time it takes before overflow can be scaled by writing
to the WDIV register and therefore can be increased by a
maximum factor of 255.
Note that the active energy register content can roll over to full-
scale negative (0x8000) and continue increasing in value when
the active power is positive (see Figure 67). Conversely, if the
active power is negative, the energy register would under flow
Energy = ∫ p ( t ) dt = Lim ? ∑ p ( nT ) × T ?
where:
? ∞ ?
T → 0 ? n = 0 ?
(20)
to full-scale positive (0x7FFF) and continue decreasing in value.
By setting the AEHF bit (Bit 0) of the interrupt mask register,
the ADE7758 can be configured to issue an interrupt (IRQ)
when Bit 14 of any one of the three watt-hr accumulation
n is the discrete time sample number.
T is the sample period.
Figure 67 shows a signal path of this energy accumulation. The
average active power signal is continuously added to the internal
active energy register. This addition is a signed operation.
registers has changed, indicating that the accumulation register
is half full (positive or negative).
Setting the RSTREAD bit (Bit 6) of the LCYMODE register
enables a read-with-reset for the watt-hr accumulation registers,
that is, the registers are reset to 0 after a read operation.
Negative energy is subtracted from the active energy register.
Note the values shown in Figure 67 are the nominal full-scale
values, that is, the voltage and current inputs at the corresponding
phase are at their full-scale input level. The average active power
is divided by the content of the watt divider register before it is
added to the corresponding watt-hr accumulation registers.
When the value in the WDIV[7:0] register is 0 or 1, active
power is accumulated without division. WDIV is an 8-bit
CONTENTS OF WATT-HR
ACCUMULATION REGISTER
0x7FFF
0x3FFF
WATT GAIN = 0x7FF
WATT GAIN = 0x000
WATT GAIN = 0x800
unsigned register that is useful to lengthen the time it takes
before the watt-hr accumulation registers overflow.
0x0000
0.34
0.68
1.02
1.36
1.70
2.04
Figure 68 shows the energy accumulation for full-scale signals
(sinusoidal) on the analog inputs. The three displayed curves
show the minimum time it takes for the watt-hr accumulation
register to overflow when the watt gain register of the corre-
0xC000
sponding phase equals to 0x7FF, 0x000, and 0x800. The watt
0x8000
TIME (Sec)
gain registers are used to carry out a power calibration in the
ADE7758 . As shown, the fastest integration time occurs when
the watt gain registers are set to maximum full scale, that is, 0x7FF.
Rev. E | Page 32 of 72
Figure 68. Energy Register Roll-Over Time for Full-Scale Power
(Minimum and Maximum Power Gain)
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